VLSI Society of India

Illuminated Mysore Palace

VLSI Education Workshop

SJCE, Mysore

May 24,2004 to June 5, 2004

Sponsored by VLSI Society of India (http://vlsi-india.org/vsi)

Cosponsored by: IEEE-SSC/EDS Bangalore, IEEE-SJCE Mysore

An intensive two-week workshop is being organized for faculty and postgraduate students of Indian organizations with the objective of exposing the participants to state-of-the-art in VLSI methodologies and design principles.  The technical program of the workshop will include tutorials from experts in the field, hands-on lab sessions, tool demonstrations, and discussion sessions.

Faculty

The faculty who will offer tutorials and lab sessions in the workshop includes :

1. Dr. M.V. Atre, Agere Systems

2. Dr Navanakta Bhat, IISc, Bangalore

3. Dr. Mahesh Mehendale, Texas Instruments

4. Dr. Rubin Parekhji, Texas Instruments

5. Mr. A.V.S.S. Prasad, Agere Systems

6. Dr Ashok Rao, IISc, Bangalore

7. Prof. K.R.K. Rao, IIT Madras

8. Dr. C.P. Ravikumar, Texas Instruments

9. Dr. M. Radhakrishna

10. Dr. A. Ravishankar, IIT Madras

11. Dr. Mahant Shetti, Karmic

12. Dr P.R. Suresh, Texas Instruments, India

13. Dr. C.R. Venugopal

14. Dr. Kuruvilla Verghese, IISc Bangalore

15. Analog Devices, India

16. Ms Sujatha Kumari, SJCE, Mysore

17. Ms Gayathri, SJCE, Mysore

18. Mr V. Nattarasu, Mysore

19. Mr Mahadeva Swamy, SJCE, Mysore

20. Dr M.N. Shanmukha Swamy, SJCE, Mysore

In addition to them, several experts from the industry and academia will hold CAD tool demonstrations.

Agenda

The agenda is available in HTML and PDF formats.  Please click the appropriate link, to get the same.

• Agenda (HTML)

• Agenda (PDF)

Registration

Registration is open to faculty and postgraduate students of M.Tech programs related to VLSI. The number of participants will be limited to 50. Participants will be admitted on a first-come first-served basis. Selected participants will be notified immediately, on or before May 15, 2004. 

Fee

The uniform pre-discounted course fee of Rs. 5000/- per participant covers the participation in the workshop, registration material including tutorial notes, on-campus accommodation, lunch and refreshments on all the days of the workshop.  An excursion to a near-by tourist spot will be organized on May 29, 2004 (Sunday) depending on the interest of the participants. As an additional bonus, all the participants of the course will be automatically considered for fellowships in the VLSI Design and Test Workshops to be held in Mysore during August 26-28, 2004. The organizers should receive a demand draft for the registration amount on or before May 11, 2004.  The DD must be drawn in favor of “VLSI Education Workshop 2004” payable at Mysore. Please use the registration form.

Workshop Organizer