15th VLSI Design And Test Symposium
VDAT2011
July 7-9, 2011Wipro Technologies, Pune, India
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Physical Design | Verification | Short Tutorials | Research Scholar Forum | Invited talks
Tutorials
Tutorial - 1A
Fundamentals & Design of Phase-Locked Loops (PLLs)
Dipankar Nagchoudhuri, Subhajit Sen, and Chetan Parikh (DAIICT, Gandhinagar)
Tutorial - 1B
Future directions in IC technology for RF communication: Challenges and Opportunities
Rajnish Sharma (CIET, Chandigarh)
Tutorial - 2A
Challenges in the Physical Implementation of Automotive SoC's in RFCMOS65
Madhu Kiran, and Christian Joseph (NXP Semiconductors)
Tutorial - 2B
Challenges in Automotive Chip Testing for Power Consumption & Analog-Mixed Signal Tests
Janardhan E, Venkatesh S S, and Saurabh Patodia (NXP Semiconductors India Pvt. Ltd)
Tutorial - 3
An Overview of Modern-day VLSI Design & Test Practices
C.P. Ravikumar (Texas Instruments India)
Technical papers
Analog
A Novel Fully Differential Folded Cascode Operational Transconductance Amplifier
Kumaravel Sundaram; Venkataramani Balasubramanian; Ajit Randhir; and Ramakrishna Chowtri (NIT Trichy)
Inductive Degenerated Low noise Amplifier for Wireless Application in 0.18um UMC CMOS
Kapil Soni; and Rajendra M.Patrikar (VNIT, Nagpur)
A Low Glitch Current Switch with Reduced Swing and its Application to PLL Charge Pump
Subhajit Sen (DAIICT, Gandhinagar); and Amir Hadji-Abdolhamid (Broadcom, Irvine, USA)
Optimized Flash Analog to Digital Converter using LCT Comparator
Meghana Kulkarni (K.L.S.G.I.T. Belgaum); V Sridhar (P.E.S. College of Engineering, Mandya, Karnataka); and G. Kulkarni (Jain College of Engineering, Belgaum, Karnataka)
Low Voltage Constant Hysteresis Schmitt Triggers
Jayarama Ubaradka (NXP Semiconductors)
Design and Analysis of Low Noise Amplifier for WiMAX application
Suresh Naidu Lekkala; and Bhuvan B (NIT Calicut)
A 110-MHz Rail-to-rail Amplifier with Double-gate MOSFETs
Chetan D.Parikh (DAIICT, Gandhinagar); and Amara Amara (ISEP, France)
Automating the Design of Successive Approximation Analog to Digital Converters
Purushothaman A; and Chetan D.Parikh (DAIICT, Gandhinagar)
Architecture
Design and Implementation of Differential Serial Interconnect using Wave pipelining and Surfing
Bhaskar Manickam; Parthiban Dhanapal; and Venkataramani Balasubramanian (NIT Trichy)
Implementation of Embedded Resizing for MPEG-2 Decoder on Trimedia
Dayananda KS; and Milind Phadtare (NXP Semiconductors )
Devices
3.3-V Signaling with 2.5-V Devices using Dynamic Biasing
Jayarama Ubaradka; and Dharmaray Nedalgi (NXP Semiconductors)
A Design of Experiment based Approach to Variance Optimal Design of Analog Circuits
Arnab Khawas; Siddhartha Mukhopadhyay (IIT Kharagpur); and Amitava Banerjee (National Semiconductor)
Simulation of 22nm n-Metal Oxide Semiconductor Field Effect Transistor
Madhuri Borkar; Rashmi Gautam; and Rajendra M.Patrikar (VNIT, Nagpur)
FPGA
VLSI Architecture and FPGA Implementation of Image Enhancement Algorithms
Hitendra Gupta (LNMIIT); Kamlesh Sharma (MNIT); and Shiv Joshi (IIT Delhi)
Development of a Bird's eye view Parking Assistance System on a Programmable Multimedia Processor
Bijo Thomas; Yann Picard; Rajiv Chithambaran; and Cecile Cougnard (NXP Semiconductors)
Low Power
A Method to Reduce Switch-On Delay in Miller Based Slew Rate Controlled IO
Dharmaray Nedalgi; and Kiran Gopal (NXP Semiconductors)
Architectural Power Management for Battery Lifetime Optimization in Portable Systems
Manish Kulkarni; and Vishwani Agrawal (Auburn University)
Memory
Tied-Gate DG-FinFET based Radiation Tolerant SRAM Cells
Surendra Rathod; A Saxena; and S Dasgupta (IIT Roorkee)
BER Analysis of Flip-Flop and Latches with Wire Pipelining
Devendra Giri; Gagnesh Kumar (NIT Hamirpur); and Diwakar Singh (Faculty)
Critical Charge Model for Novel Radiation Tolerant Flip-Flop
Surendra Rathod; A Saxena; and S Dasgupta (IIT Roorkee)
Halo Implant Photoresist Mask layer Shadow effect on Leakage in 65nm SRAM Cell
Srinivasaiah H. C. (Dayananda Sagar College of Engg)
A (1/5.5 x VDD) to (3/2 x VDD) Bidirectional I/O Buffer at 0.35µm, 3.3V CMOS Technology using Innovative Input Receiver
Arnab Biswas; and S Dasgupta (IIT Roorkee)
Self Times System Design Using FIFO
Mansi Jhamb (USIT, GGSIPU); Vinod Kumar Khera (GTBIT, GGSIPU); R.K. Sharma; and A.K. Gupta (NIT Kurukshetra)
Nanotechnology
Performance Analysis of Carbon Nanotube Interconnects
Tafseer Alam; Rohit Dhiman; and Rajeevan Chandel (NIT Hamirpur)
Optimisation of Lateral Silicon Nanowire based Solar Cell using 3D TCAD Simulation
Jitendra Kumar; Sanjeev Manhas (IIT Roorkee); Brijesh Kaushik (Faculty); A Saxena; and Dharmendra Singh (IIT Roorke)
Physical Design
Cluster based Routing for Multi pin droplets in Digital Microfluidic Biochips with Intelligent Collision Avoidance
Pranab Roy; Hafizur Rahaman (B.E.S.U, Shibpur); and Parthasarathi Dasgupta (I.I.M, Calcutta)
Low Power High Throughput Differential Current Mode Signaling Technique for Global VLSI Interconnect
Sujeet Kumar; R.B. Deshmukh; and Rajendra M.Patrikar (VNIT, Nagpur)
On-Chip Test Circuits for Throughput Measurement of High Speed Interconnects
Amit Vishnani; Marshnil Dave; Maryam Baghini; and Dinesh Sharma (IIT Bombay)
Verification
Layered Testbench Framework for Verification
Praveen Kumar (Intel Mobile Communications)
CATD: A Tool for Consistency Analysis of Timing Diagrams
Moumita Das (Meghnad Saha Institute of Tech); Ansuman Banerjee (Indian Statistical Institute, Kolkata); and Subhashis Majumder (Heritage Institute of Technology)
Simulation of Low Voltage Flash Memory Cell
Ashwini Shrirao; Rashmi Gautam; and Rajendra M.Patrikar (VNIT, Nagpur)
Foolproof Methodology to Verify Clock stop in SoC
Narendran Kumaragurunathan (AMD)
Short Tutorials
Wireless System Design and System Engineering Challenges
Muralidhar Bandi; Kameswara Rao B; Ajith Kumar V K; and B. Ravi Kishore (HCL Technologies)
Integrated Chip Quality For Automotive Applications
Raghavendra Dattatraya; Jagadeesh Nallagatla; and Poornima Prahlada (NXP Semiconductors)
Design and Verification with SystemC
Bhanu Kapoor (Mimasic), Prapanna Tiwari (Synopsys), Shireesh Verma (Conexant), and Rahul Joshi (Chip Design Pvt. Ltd., Gurgaon)
Research Scholar Forum
Performance Optimization of FinFET for Ultralow Power Circuits
Sachin Pable (PDVVP's COE Ahmednagar); A Kureshi (Vishwabharati College of Engg); and Mohd. Hasan (AMU, Aligarh)
On-line Detection of Crosstalk Fault in FPGA using BIST Model
Nachiketa Das; Hafizur Rahaman; and Pranab Roy (BESU, Shibpur)
Design of RFLow Noise Amplifier using CMOS Technology at 2.45GHz
Anand Deshkar; Amol Deshmukh; and Swati Dixit (G.H.Raisoni College of Engg)
Investigation of Linearity Performance of a Double Gate Band to Band Tunnel Field Effect Transistor
Rakhi Narang (University of Delhi); Manoj Saxena (Deen Dayal Upadhyaya College, University of Delhi); R. S. Gupta (Maharaja Agrasen Institute of Technology); and Mridula Gupta (University of Delhi, South Campus)
Analog Performance of Insulated Shallow Extension Silicon On Nothing (ISE-SON) MOSFET: Simulation study
Vandana Kumari (University of Delhi); Manoj Saxena (Deen Dayal Upadhyaya College, University of Delhi); R. S. Gupta (Maharaja Agrasen Institute Of Technology); and Mridula Gupta (University of Delhi, South Campus)
A Wide Temperature Range (50- 500K) Analysis for Nanoscale Surrounding Cylindrical Gate MOSFET with Localised Charges
Rajni Gautam (University of Delhi); Manoj Saxena (Deen Dayal Upadhyaya College, University of Delhi); R. S. Gupta (Maharaja Agrasen Institute of Technology); and Mridula Gupta (University of Delhi, South Campus)
Study of Energy Efficiency of Single Phase Energy Recovery Logic with Progressive Technology
Jitendra Kanungo (IIT Roorkee); and S Dasgupta (IIT Roorkee)
Analysis and Modeling of Series Resistance in SI-Nanowire MOSFET
Gaurav Kaushal (IIT Roorkee); Satish Maheshwaram (IIT Roorkee); S Dasgupta (IIT Roorkee); and Sanjeev Manhas (IIT Roorkee)
Low power Switching Activity on Scan based Testing Vector using Folding Method
Saravanan Sivasankaran (SASTRA university); and HarNarayan Upadhyay (SASTRA university)
Behavioural Analysis of Clock Jitter Effects in Continuous Time Sigma Delta Modulator
Kumaravel Sundaram (NIT Trichy); Venkataramani Balasubramanian (NIT Trichy); and Akhila M (NIT Trichy)
Keynote and Invited Talks
Keynote-1 July 8
Embedded Microcontroller Solutions for Automobile Safety
Speaker: Hoiman Low (Texas Instruments)
Abstract: The use of microcontrollers in automobile safety applications such as Anti-Lock Brake System (ABS), Electronic Stability Program (ESP) and Airbag System have grown significantly in recent years. These are 32-bit CPU microcontrollers designed in sub-micron embedded Flash technology. The expectation is that these microcontrollers work reliably under harsh environmental conditions over the full life time. This presentation examines the design options to address 0 dppm quality, safety goal and system availability target.
Keynote-2 July 8
Convergence of Bio-Nano-Information Technologies in the Nanoelectronics Era
Speaker: V.Ramgopal Rao (IIT Bombay)
Abstract: CMOS scaling is expected to slow down owing to the huge cost, power and variability constraints. This has necessitated a paradigm shift in the CMOS scaling trends from the "More Moore" to the "More than Moore", allowing for the integration of heterogeneous technologies on a CMOS platform. The key idea is to achieve a functional diversification on the chip by empowering the CMOS technologies with a variety of "sense & interact" functions. In this talk we will look at the nano-electro-mechanical-systems (NEMS) as one such enabling platform for sensor integration with the CMOS.
Many of the bio-chemical sensing applications require an ultra sensitive, low cost and disposable sensor. In this work we present a novel polymer process technology for realization of a highly sensitive nano-particle based piezo-resistive polymer composite cantilevers that can be fabricated at sub 1000 C process temperatures, allowing for the integration of these technologies on a CMOS die. Electro-mechanical characterization of the fabricated microcantilevers yielded a resonance frequency, which is a few tens of kHz and a deflection sensitivity in the range of 1 ppm (ΔR/R) for a nanometer of deflection. These cantilevers have been used for a range of applications such as for detection of explosive molecules such as TNT/RDX in the parts-per-trillion level of concentrations as well as for developing an integrated system to provide point-of-care diagnostic support for cardiovascular diseases. Prototypes of these systems are currently under development at IIT Bombay for field trials. These activities involve collaborations between faculty & students from the Departments of Electrical Engg., Bio Sci. & Engg, Metallurgy & Materials Science, Physics, Chemistry, Mechanical Engineering, and Industrial Design Centre at IIT Bombay.
A company NanoSniff Technologies Pvt. Ltd. is incubated at IIT Bombay for commercialization of these technologies.
Keynote-3 July 9
Automotive Electronics Innovation Driven by Global trends and Challenges for Society
Speaker: Carol de Vries (NXP Semiconductors)
Abstract: Seamless Connectivity, Sustainable mobility, Increased Safety and Comfort and Affordability are the main drivers of innovation in automotive electronics industry. All the challenges give a new focus to the semiconductor industry requiring high performance mixed signal solutions. These challenges are also driven by local needs around the globe and provide immense innovation opportunities. In this keynote, Carol will bring out the trends and challenges and throw light on how the innovations in VLSI and embedded systems domains are enabling automotive industry meeting the challenges.