One-day Course on Circuit Marginalities

Dealing with VLSI Design and Circuit Marginalities during Test
UPDATED 25 June 2006

August 1, 2006, Kolkata, India

Venue: The SENATOR Hotel
15 Camac Street, Kolkata-700 017
Ph: +91-33-2289 3000/6, Fax: +91-33-2281 3093
Website: www.thesenatorhotel.com

Organized by

http://vlsi-india.org/vsi

VLSI Society of India

Event Report   Event photographs

Overview:

An increasing number of chip failures are caused by circuit marginalities. Circuit marginality encompasses failures due to unsafe design approximations, process variations, and failure to account for some electrical and thermal properties of a chip. In this tutorial, we will describe physical causes, modeling approaches for pattern generation and general discussion on avoidance techniques.

The tutorial is targeted to practicing Engineers, Students and University Faculty. Course content provided below.

In cooperation with

http://www.ieee.org

IEEE TTTC Kolkata Chapter

Course conducted by:

Sandip Kundu, University of Massachusetts, USA

Sandip Kundu is a Professor of Electrical and Computer Engineering at University of Massachusetts, Amherst. Previously, he was a Principal Engineer at Intel and Research Staff Member at IBM Yorktown. He has published more than 70 papers in diverse areas including VLSI design, Testing, CAD and Coding & Information Theory.

Sandip holds several US patents. He has given more than 10 tutorials at international conferences such as the VLSI Test Symposium, International Test Conference, DATE, and others. His major accomplishments include Intel ultra-drowsy technology (US Patent 6,715,091), mixed synchronous and asynchronous circuit simulation technology used at Intel (US patent 6,973,422), commercial CAD software called GateMaker^TM (sole author) that is marketed by Cadence after its acquisition from IBM and t-SyEC/AUED codes used in optical communications.

He was the Technical Program Chair of ICCD in 2000 and General Chair in 2001. He served as a General Chair of the International Conference on VLSI Design, 2005. Prof. Kundu is currently an associate editor of IEEE Transactions on Computers.

The announcement has the registration form. You may also copy the below registration form, including the Course heading, paste into your worrd editor, with a 1/2 inch margin around to print.