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VSI Committee have decided on refund policy for cancellation of their event registrations as mentioned below, also applicable to non-students:
  • a) It is permissible for the concerned student to nominate another student to attend.

  • b) VSI will also permit the student to apply the amount to another program that will run in 2006
  • When available, please use the Venue weblink for more info on location and access details.
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    Electronic System Level Design Workshop 2007

    January 11 -12, 2007
    Venue:  Wipro Learning Center, Electronics City, Bangalore
    Organized by

    http://vlsi-india.org/vsi
    VLSI Society of India
    In collaboration with
     
    http://www.ieee.org
    IEEE Circuits and Systems Society,
    Bangalore Chapter
    Corporate Sponsors

    Wipro - ARM Embedded Technologies Pvt Ltd.,

    Panel Discussions on ESL in Education, and ESLD: Opportunities in India were held during the workshop.
    Visit for details and to download slides presented. - Workshop details - Photographs

    ESLD 2007 Workshop - A report

    The second workshop on Electronic System-level Design (ESLD 2007) was held during Jan 11-12, 2007 in Bangalore. The workshop was organized by VSI in cooperation with IEEE CAS Bangalore chapter. Wipro and ARM were the corporate sponsors of the event. The workshop was inaugurated by Prof. Nikil Dutt (UCI), Dr Rishiyur Nikhil (Bluespec), Zafar Ahmed (ARM), Prasad Bhatt (Wipro), and Brian Bailey (Poseidon Design Systems).

    Prof. Nikil Dutt delivered the keynote address on Day 1, on the topic "In Search of the Elusive Golden Reference Model for ESLD" which set the trend for the proceedings of the workshop by raising fundamental questions on the right level of abstraction. The other speakers who spoke on Day 1 included:

    Dr. Rishiyur Nikhil, CTO, Bluespec Inc.
    Zafar Ahmed K, ARM Embedded Technologies Pvt. Ltd 
    Dr. Sachin Ghanekar, Tensilica
    Dr. Kanishka Lahiri, NEC-Labs
    Dr. Sandeep Shukla, Virginia Tech Univ.
    Srinivasan Venkataraman, Synopsys
    Amit Sharma, Synopsys
    Charlie Hauck, VP Engineering, Bluespec Inc

    Brian Bailey, Poseidon Design Systems, delivered the keynote talk on Day 2 on the topic of "Yin and Yang of Verification." His talk clarified the difference between verification and validation, and positive and negative verification. He stressed the need for positive verification, which provides value by asking "Does the system under verification do anything useful?"

    An Indian chapter of the System C User Group was inaugurated. The other featured speakers for Day 2 were:

    T.S. Rajesh Kumar, Texas Instruments Bangalore
    Aravinda Thimmapuram, NXP Semiconductors
    Desingh Balasubramanian, Poseidon
    Mr. Karthick, NXP Semiconductors

    Two panel discussions were held on Day 2. The first one was on "ESLD in Education" and was moderated by Nagendra Gulur of TI India. The panelists were S. Karthik (Analog Devices) K. Krishna Moorthy (National Semiconductors) and Prof. S.K. Nandy, Indian Institute of Science. The second panel was on ": ESLD in India: Opportunities and challenges" and was moderated by Shiv Tasker of Bluespec. The panelists were Ramesh Subbarao (Texas Instruments), Mudit Mathur (Wipro Technologies), Vishal Suresh (NXP Semiconductor), Sarang Shekle (Poseidon Systems), and Prof. S.K. Nandy, Indian Institute of Science.

    ARM Embedded Technologies held a demonstration of their tools at an exhibit booth.