VLSI Design and Test Symposium organized by the VLSI Society of India since 1998 Please visit Related Info for details on VDAT and VLSI Faculty Mailgroups.

Symposium Committee General Chair C.P.Ravikumar, Texas Instruments India Finance Chair Dinesh Bapat, TI India Sponsorship Contact vdat-sponsor@vlsi-india.org

Tech. Program Committee Details Organized by VLSI Society of India Co-sponsored by Texas Instruments India Wipro Technologies NXP Semiconductors In co-operation with IEEE Pune Section Supported by Microsoft's CMT

Goals of VDAT Symposium
The idea behind VDAT or the VLSI Design And Test Symposium is to promote Research and Development on all aspects of VLSI in India. This symposium is a forum for free discussion on hot and emerging topics on VLSI and the related for VLSI professionals from India and abroad.
VDAT began in 1998 as a workshop with about 30 participants at Chennai. With the participation growing steadily each year, from the year 2005, VDAT has acquired the status of a Symposium. The VLSI Industry in India and academic community working in the area of VLSI have provided immense support to the symposium. The symposium is conducted during JUly each year, with participation from accross the world.
VDAT is organized by the VLSI Society of India, with support and sponsorship from leading institues and the industy. Technical papers
Original and unpublished works are invited which undergo a blind review process by the peers in the field. Authors of accepted papers will be required to submit full papers and presentation foils. Final submissions are made available as proceedings of the symposium in both CD and hardcopy format. For a list of previous VDAT proceedings available, visit VSI publications. Tutorials
The first day of the symposium is devoted to Tutorials conducted by experts in the field. Three separate tutorials on diverse topics run concurrently, which can be attended separately. VLSI Education Day
The second day of the symposium is observed as VLSI Education Day with an intention to bring together VLSI professionals in academia and the industry. VLSI Education Day includes:
     Student projects
     Keynote speeches from eminent personalities
     Panel discussion on topics related to VLSI Education in India
     Invited talks from VLSI Professionals
     Short paper presentations from Indian Colleges
The subsequent days of the event are devoted to presentations of the accepted technical papers, keynote speeches and panel discussions. From the year 2006, VDAT has introduced the Research Scholars' Forum. Researh scholars can submit their Ph.D. theses which are briefly reviewed by the committee. The overview of selected theses can be presented by the authors during the session attended by the Experts to provide feedback. Fellowship

Fellowships are made available to teachers, students and research scholars from educational institutions to attend VDAT. Applicants should submit the Felowship form before the set date. The selected list by the Fellowship committee will be displayed on our website, besides being intimated by mail. Fellows must first register with the fellow category tariff under registration details. In the event of non-selection, the balance amount should be sent to attend the event. Details under fellowship. Registration

Any one interested in the field of VLSI can register and attend the event. At least one author of each selected paper must register and present the paper. Please refer Registration details.

VDAT Event History

VDAT began as a small workshop in the year 1998. In 2005, it acquired the status of a Symposium. The proceedings of VDAT are published in both hard and softcopy format. Visit VSI Publications for details on proceedings and Photo Gallery for images of past VDAT and VSI events. More details on past VDAT Workshops and Symposium.

Event Place Date Participants 1st VDAT Workshops Chennai Jan 7, 1998 30 2nd VDAT Workshops Habitat World, New Delhi Aug 6-7, 1998 70 3rd VDAT Workshops New Delhi Aug 20-21, 1999 120 4th VDAT Workshops New Delhi Aug 25-27, 2000 150 5th VDAT Workshops Bangalore Aug 16-18, 2001 200 6th VDAT Workshops Bangalore Aug 29-31, 2002 320 7th VDAT Workshops Bangalore Aug 28-30, 2003 300 8th VDAT Workshops Infosys Leadership Institute, Mysore; Aug 26-28, 2004 250 9th VDAT Symposium Wipro Learning Center, Bangalore Aug 10-13, 2005 300 10th VDAT Symposium International Centre, Goa Aug 9-12, 2006 220 11th VDAT Symposium Saha Inst of Nuclear Physics, Kolkata Aug 8-11, 2007 250 12th VDAT Symposium Wipro Campus, Bangalore July 23-26, 2008 200 13th VDAT Symposium Wipro Campus, Bangalore July 8-10, 2009 200 14th VDAT Symposium Chitkara University, Himachal Pradesh July 7-9, 2010 200

VDAT Mailing Group
A mailing group is setup at http://groups.yahoo.com/group/vdat to provide information about the VLSI Design and Test Symposium held in India every August. In addition, information about other similar events taking place in India or abroad is also disseminated through this mailing list.
        You may use vdat@yahoogroups.com to publicize events related to VLSI Design/EDA/Test that take place in and around India. You can also use this address to discuss/debate issues related to VLSI in India. The list owner of the VDAT mailing group may be contacted at: vdat-owner@yahoogroups.com.
        To subscribe, you may send a mail to vdat-subscribe@yahoogroups.com
        To unsubscribe, send a mail to vdat-unsubscribe@yahoogroups.com
        You will receive a confirmation mail, to be acknowledged within a week to subscribe/ unsubscribe.
        Become a VDAT Mailing Group member to keep yourselves updated on forthcoming events.
Faculty Page
        http://groups.yahoo.com/group/vlsi-faculty-india
        This is meant only for Indian faculty in the area of VLSI/semiconductors/microelectronics. Anyone who wishes to subscribe must send a note from their official e-mail ID with details such as: Name, Designation and Affiliation to
        vlsi-faculty-india-subscribe@yahoogroups.com Or visit the site and click Join This Group Feedback: Please use the feedback form for your queries.
Related sites
        VLSI Related sites
        International Conference on VLSI Design and Embedded Systems
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Guidelines to authors
    The submissions should represent original contribution and should not have been submitted to other forums.
    It is important that abstracts bring out the contribution and novelty of the paper.
    Students must note that reusing material from published work is incorrect and amounts to violation of copyright.
    Survey papers are not acceptable.
    Submitting authors must become members of the VDAT mailing list, where updates are sent.
    Authors must upload their submissions at the specified website, and must not send it through mail.
    Submissions will undergo blind review – the authors must not include their names or affiliations.
Notification
All the submitting authors are notified on the status of acceptance via mail, and the reviews are displayed on the relevant website, to aid the authors of accepted papers to improvize final submission.
Page limit
The accepted papers are published in the hardcopy of proceedings, and also distributed as softcopy along with their slides. The papers are categorized as Full papers/Embedded Tutorials and Short Papers. Full papers get 10 pages in the hardcopy and Short papers 8 pages. As the paper size of the VDAT proceedings are smaller than letter size, follow the guidelines to format page layout.
      The set page limit for both category includes figures, text, references etc.,
If the authors notice that they are exceeding the page limit set by the committee, they must contact the Publications Chair for approval. The publications chair has the authority to approve one extra page. Authors have the option of buying at most two extra pages by paying Rs. 1000/- per page. Send the DD to Finance Chair; and make the draft payable to "VDAT Symposium (year as applicable)."
One or more of the authors must register as a participant and present the paper.
Formatting
Papers that do not comply with these guidelines will not be included in the hardcopy proceedings.
    Papers must be submitted in DOC format using Microsoft Word. No other formats are acceptable.
    Do not include color photographs or graphics.
    Figures must be of high resolution and must not have gray background.
    Importing bitmap images in Microsoft Word will not be acceptable.
    Authors must not use any material (figures and/or text) from the Internet or other sources without acknowledgement.
    The authors must output hardcopy of their manuscript and ensure that all the figures are legible and also output PDF to verify the figures and tables show up before sending. PDF is used for the softcopy.
Note
Please visit for details on Page formatting DOC & PPT foils, and download template file.

VDAT2011 July 7-9, 2011 Wipro Technologies, Phase 1, Plot No 2, MIDC Rajiv Gandhi Infotech Park, Hinjewadi, Pune 411057, India VDAT2011 Accepted Papers Advance Program PDF 760KB Invited Talks Tutorials 7 July Fellowship Registration Venue Symposium Committee Accommodation Full-day tutorials on July 7, 2011 and the Symposium during July 8-9, 2011 require separate registration. Please refer to related details. Online registration Registrations are now open

Last Dates Paper submission: Mar 2, 2011 Tutorial submission: Mar 2, 2011 Notification of acceptance: May 10, 2011 Camera-ready submission: June 1, 2011 Presentation submission: June 7, 2011 Program Symposium Dates: July 7-9, 2011 Full-day Tutorials: July 7, 2011 Conference: July 8-9, 2011 Technical Sessions Analog, Architecture, Devices, FPGA, Low-power, Memory, Nanotechnology, Physical Design, Verification, Research Scholars' Forum Sponsored by VLSI Society of India Co-sponsors Texas Instruments India Wipro Technologies In cooperation with IEEE Pune Section

Technical Program July 7: Full-day Tutorials Tutorial – T1 Analog & RF Design T1-A Fundamentals & Design of Phase-Locked Loops (PLLs) Dipankar Nagchoudhuri, Subhajit Sen, and Chetan Parikh (DAIICT, Gandhinagar) T1-B Future directions in IC technology for RF communication: Challenges and Opportunities Rajnish Sharma (CIET, Chandigarh) Tutorial – T2 Automotive SoC T2-A Challenges in the Physical Implementation of Automotive SoC's in RFCMOS65 Madhu Kiran, and Christian Joseph (NXP Semiconductors) T2-B Challenges in Automotive Chip Testing for Power Consumption & Analog-Mixed Signal Tests Janardhan E, Venkatesh S S, and Saurabh Patodia (NXP Semiconductors India Pvt. Ltd) Tutorial – T3 VLSI Design & Test An Overview of Modern-day VLSI Design & Test Practices C.P. Ravikumar (Texas Instruments India) July 8 - 9: Symposium Technical papers; Invited and Keynote talks; Embedded Tutorials; Panel discussion; VSI Meeting; Research Scholars' Forum

Symposium Highlights Keynote talk-1: July 8 Embedded Microcontroller Solutions for Automobile Safety Hoiman Low (Texas Instruments) Keynote talk-2: July 8 Convergence of Bio-Nano-Information Technologies in the Nanoelectronics Era V.Ramgopal Rao (IIT Bombay) Keynote talk-3: July 9 Automotive Electronics Innovation Driven by Global trends and Challenges for Society Carol de Vries (NXP Semiconductors) Short Tutorials Wireless System Design and System Engineering Challenges Muralidhar Bandi; Kameswara Rao B; Ajith Kumar V K; and B. Ravi Kishore (HCL Technologies) Integrated Chip Quality For Automotive Applications Raghavendra Dattatraya; Jagadeesh Nallagatla; and Poornima Prahlada (NXP Semiconductors) Design and Verification with SystemC Bhanu Kapoor (Mimasic), Prapanna Tiwari (Synopsys), Shireesh Verma (Conexant), and Rahul Joshi (Chip Design Pvt. Ltd., Gurgaon) Panel discussion: VLSI Education in India: What is the next step? Moderator: Prof. Vishwani D. Agrawal (Auburn University) Panelists: Dipankar Nagchoudhuri (DAIICT, Gandhinagar), Rajnish Sharma (CIET, Chandigarh), N.S. Murty (NXP Semiconductors), and Niranjan Pol (LSI) Research Scholars' Forum