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		12th IEEE VLSI Design And Test Symposium - VDAT 2008 July 23-26, Wipro campus, Electronics city, Hosur Road, Bangalore, India Organized by: VLSI Society of India Industry Sponsors: Wipro Technologies, Texas Instruments India, NXP Semiconductors, Synopsys, ARM Embedded Technologies, Intel India In cooperation with: IEEE-CAS Bangalore Chapter Supported by: Microsoft's Conference Management Service Tutorial-3: Design Verification Methodologies T3-3: Design Verification using Static Checker and Verification of Clock-domain Crossing Speaker: Kaushik De, Synopsys
VLSI Education Day    Symposium    « T1-RF Design and Test    « T2-1 Low-power    « T2-2 Low-power    « T3-1 DVM    « T3-2 DVM  T3-3 DVM  Assorted »
Dr. Kaushik De (Synopsys India)
« T1-RF Design and Test    « T2-1 Low power Design    « T2-2 Low power Design    « T3-1 DVM    « T3-2 DVM  T3-3 DVM  Assorted » Top