VSI EVENTS 2005 - PRESENT
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The proceedings of most of these workshops are available as softcopies. The VDAT Symposium proceedings, in addition to the previous years' are available in both hard and softcopy formats.
Visit VSI Publications or write to vsisecy@vlsi-india.org for details on the proceedings and other VSI related queries.
August 2008
· Short Course on Digital Circuits Test and DFT
11-14 August 2008; Hyderabad ... Details to be announcedPresenters: Dr.Nilanjan Mukherjee, Mentor Graphics Corporation, USA; Prof. Sudhakar M.Reddy, Iowa Univ., USA; and Dr.C.P.Ravikumar, Texas Instruments India
July 2008
· 12th IEEE VLSI Design And Test Symposium - VDAT2008
July 23-26, 2008Wipro Campus, Electronics City, Bangalore
Organized by: VLSI Society of India
Industry Sponsors: Texas Instruments India, Wipro Technologies, and others
Supported by: IEEE-CAS Bangalore Chapter, Microsft's Conference Management Service, and others
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· 3rd Workshop on Custom LSI Design - CLDW2008
July 6-20, 2008; Bagalkot, Karnataka ... Details to be announcedConducted by: Dr.Mahant S.Shetti, and KarMic Team
June 2008
· One-day VLSI Design Workshop
June 2008, Kolkata ... To be announced
April 2008
· 4th Workshop on Design Verification Methodologies - DVM2008
25-26 April 2008, BangaloreSpeakers: Prabhat Agarwal, Sankalp Semiconductor, Aniruddha Baljekar, NXP Semiconductors, Ansuman Banerjee, Interra Systems India, Gurudutt Bansal, Cadence Design Systems, Vishal Choudhary, NXP Semiconductors, Pallab Dasgupta, IIT Kharagpur, Kaushik De, Synopsys India, Sainath Karlapalem, NXP Semiconductors, Raj Mitra, Texas Instruments, Abhijit Ray, Cadence Design Systems, Badri Seshadri, NXP Semiconductors, Pradip Thaker, Analog Devices Inc., Srinivasan Venkataramanan, Synopsys India, Haridas Vilakathra, NXP Semiconductors
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January 2008
· 21st International Conference on VLSI Design And 7th Intl Conference on Embedded Systems
January 4-8, 2008 HICC, Hyderabad, IndiaSponsored by: VLSI Society of India
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December 2007
· 2nd Workshop on Interconnect Design and Variablity - IDV2007
December 13-14, 2007; The Atria Hotel, Bangalore, IndiaSpeakers: Juan C. Rey, Mentor Graphics Corporation; Kazuya Masu, Tokyo Institute of Technology; Ersed Ackasu, OEA International, Inc.; Noel Menezes, Intel Corporation; Sachin Sapatnekar, University of Minnesota; Tom Williams, Synopsys; Vish Sundararaman, Texas Instruments Inc., Dallas; Steffen Rochel, Blaze DFM Inc.,; Nishath Verghese and Atul Sharan, Cadence Design Systems; Nagaraj, N.S., Texas Instruments Inc., Dallas, Palkesh Jain and Gautam Kapila, Texas Instruments India; Madhav P. Desai, IIT Bombay, and Vani Prasad, Freescale Semiconductor; Vidyasagar Ganesan, AMD
Organized by: VLSI Society of India
Sponsored by: Cadence Design Systems, and IEEE-CAS Bangalore Chapter
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August 2007
· Low Frequency and High Frequency Noise in Bipolar transistors
Seminar jointly announced by
PragaTI (TI India Technical University), VLSI Society of India, and IEEE Circuits and Systems Society (Bangalore Chapter)
August 23, 2007 - TI India Auditorium, Texas Instruments India
Speaker: Jayasimha Prasad, Maxim Integrated Products (USA)
· 11th IEEE VLSI Design And Test Symposium - VDAT2007
August 8-11, 2007, Kolkata
Sponsored by: VLSI Society of India
Industry Sponsors: Interra Systems, Texas Instruments India, Emerging Memory Tech., Synopsys, Magma
In cooperation with Institute of Radio Physics and Electronics, Calcutta University; Dept. of E & TCE, Jadavpur University; Indian Statistical Institute; Kolkata School of VLSI Technology; Bengal Engg. and Science University; IEEE Kolkata Chapter
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· Short Course on Digital Circuits Test and DFT
August 13-17, 2007, Noida, UP
Presenters: Dr.Nilanjan Mukherjee, Mentor Graphics and Prof. Sudhakar M. Reddy, Iowa Univ., and Dr. C.P.Ravikumar, Texas Instruments India.
Organized by: VLSI Society of India
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July 2007
· Two-day Course on Low-power Design and Test
July 30-31, 2007 - Hyderabad.
Conducted by Dr. Vishwani Agrawal, Auburn University, USA and Dr. Srivaths Ravi, Texas Instruments India
Organized by: VLSI Society of India, In cooperation with: CDAC Hyderabad, and VSI Hyderabad Chapter
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· One-day Seminar on Design For Manufacturability and Reliability
July 27, 2007 - Kolkata.
Conducted by Prof.Sandip Kundu, University of Massachusetts, USA
Organized by: VLSI Society of India, In cooperation with: IEEE, Kolkata Chapter
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· Five-day Course on Digital VLSI Design
July 23-27, 2007, Golden Jubilee Hall, ECE Dept, IISc, BangaloreConducted by: David Money Harris, Associate Professor, Harvey Mudd College of Engineering, CA, USA, and Bharadwaj Amrutur, Assistant Professor, ECE Dept, Indian Institute of Science, Bangalore
Organized by: VLSI Society of India, Co-sponsored by: IEEE-CAS Bangalore Chapter
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· A two-week long workshop on Analog VLSI ( VLSI Related event )
July 4-15 2007, Madhurai, Tamil Nadu
Call for participation PDF 400KB Contact
Anchored by: Texas Instruments (India)
Sponsored by: Prof. Radhakrishna Rao Foundation, Supported by: Thiagarajar College of Engineering, Madurai, TN.
May 2007
· Design Techniques for Modern Electronic Devices, VLSI & Communication Systems (DTVC-07)14-15 May, 2007 - E&CE Dept. NIT Hamirpur
Organized by: Department of ECE, National Institute of Technology, Hamirpur 177 005, Himachal Pradesh, India
Sponsored by: TEQIP NIT Hamirpur, VLSI Society of India (VSI)
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April 2007
· 2nd workshop on Mixed Signal VLSI Design and TestApril 25-26 2007
Venue: PSG College of Technology, Coimbatore Speakers: Dr. P.V. Anand Mohan, ECIL; Dr Shanthi Pavan, IIT Madras; Dr. Chetan D. Parikh, DA-IICT, Gandhinagar; Dr. M.C. Bhuvaneswari, PSG College of Technology; Dr. R. Neelaveni, PSG College of Technology; Jais Abraham, InnoDes Solutions Pvt Ltd; Jairam Sukumar, Texas Instruments India; Asif Ahmad, Analog Devices; Sharat Chandra, Texas Instruments India; Arjun Prakash, Tessolve Services Pvt Ltd; Sheetal Morajkar, Texas Instruments India Pvt Ltd; Girish Vaidya, Wipro Technologies;
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· 3rd Workshop on Design Verification Methodologies
April 5-6, 2007, I Square IT Campus, Hinjewadi, Pune.
Organized by: VLSI Society of India
Supported by: International Institute of Information Technology (I2IT), Pune and IEEE Pune sub-section
Corporate Sponsor: Wipro Technologies
Speakers: Dr. P.P.Chakrabarti - IIT Kharagpur; Tarun Garg, Cadence Design Systems; Shanthamoorthi Velusamy, Wipro Technologies; Haridas V., SoC Design Technology, NXP Semiconductors India; Dr.Kaushik De, Verification Business Unit, Synopsys India; Desingh D Balasubramanian, Poseidon-Systems India; Dr. Supratik Chakraborty - IIT Bombay; Aditya Kher, Synopsys India; Manikandan Panchapakesan, NXP Semicondutors India; Vishwanath B and Ankush Jain, NXP Semicondutors India; Bhaskar Karmakar, Texas Instruments India an Mrinal Das, Sankalp Semiconductor
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March 2007
· Designing a modern System-on- Chip for Test – An industrial perspectiveMarch 9, 2007, DA-IICT, Gujrat
Sponsored by: Texas Instruments India, VLSI Society of India and DA-IICT, Gujrat
The objective of the workshop is to provide an exposure of modern-day DFT practices to the participants. The workshop will be appropriate for faculty, PG students, and final-year undergraduate students with interest in microlectronics. The workshop will be conducted by Dr C.P. Ravikumar and Mr Ram Jonnavithula of Texas Instruments, Bangalore. The topics that will be covered include
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February 2007
· 4th VTU-VSI-ISA Confluence MeetingFebruary 28, 2007, RV College of Engineering, Bangalore
Organized by: VLSI Society of India
Supported by: RV College of Engineering, Bangalore, and India Semiconductor Association
Speakers: Anuradha Srinivasan, Intel India; Ravi Kiran Kesarla and Kanad S Joshi, ARM Embedded Technologies; Madhav Chikodikar, Synplicity; Nisha P.K., Texas Instruments, India; Arun Pradeep, NXP Semiconductors India, and Razak Mohammed Ali, Altera Semiconductor India
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· Workshop on VLSI AND ITS APPLICATIONS
February 24, 2007 Padre Conceiao College of Engineering, Goa
Organized by: VSI Goa Chapter
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January 2007
· Two-day Workshop on Electronic System-level Design (ESLD 2007)Jan 11-12, 2007
Wipro Learning Center, Electronics City, Bangalore, India
Speakers:
Prof. Nikil Dutt, Center for Embedded Computer System, UC Irvine; Dr. Rishiyur Nikhil, CTO, Bluespec Inc.; Charlie Hauck, VP Technologies, Bluespec Inc.; Brian Bailey, Brian Bailey Consulting, USA; Dr. Sachin Ghanekar, Tensilica; Aravinda Thimmapuram, NXP Semiconductors; Dr. Kanishka Lahiri, NEC-Labs; Dr. Sandeep Shukla, The Virginia Polytechnic and State University; Desingh Balasubramanian, Poseidon; Srinivasan Venkataraman, Synopsys;T.S. Rajesh Kumar, Texas Instruments Bangalore
Organized by VLSI Society of India, In co-operation with: IEEE Circuits and Systems Society Bangalore Chapter
Corporate Sponsors: Wipro Technologies and Arm Embedded Technologies
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· 20th International Conference on VLSI Design and 6th International Conference on Embedded Systems
Theme: Technology Challenges in the Nanoelectronics Era
January 6-10, 2007 Bangalore
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December 2006
· First International Workshop on Interconnect Design and VariabilityDecember 28-29, 2006
ECE Dept, Golden Jubilee Hall, IISc, Bangalore
Sponsored by: VLSI Society of India
In co-operation with: Indian Institute of Science, Bangalore and IEEE Circuits and Systems Society Bangalore Chapter
Speakers:
Dr. Jaijeet Roychowdhury, University of Minnesota, USA; Dr. Krishna Saraswat, Stanford University, USA; Dr. Ram Achar, Carleton University, Canada; Dr. Shankar Balachandran, IIT Madras, Chennai, India; Vijay Sindagi, Texas Instruments, India; Dr. Tejas Jhaveri, Carnegie Mellon University, USA; Dr. Dipu Pramanik, Synopsys, USA; Dr. Mustafa Celik, Extreme DA, USA; Dr. Sarma Vrudhula, Arizona State Univeristy, USA; Dr. Vivek De, Intel, USA; Dr. N.S.Nagaraj, TI, Dallas
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· National Workshop on Challenges in VLSI (NWCV 2006)
December 21-22, 2006 – DA-IICT, Gandhinagar, Gujrat
Speakers: Prof. Amara Amara; Prof. Andrei Vladimirescu; Prof. Arun N. Chandorkar; Dr. Chetan Parikh; Prof. Dinesh Sharma; Prof. Dipankar Nagchoudhuri; Prof . G. S. Visweswaran; Dr. Kaushik Saha; Dr S S Mahant Shetti; Dr. Nagendra Krishnapura; Dr. Philippe Royannez and Dr. Rahul Dubey
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October 2006
· Third VTU-VSI-ISA Confluence meetingOctober 13, 2006 Hubli
Co-ordinator: B.L. Desai of BVB Engineering College, Hubli
Speakers: Arun Pradeep, NXP Semiconductors; Gururaj Badiger, NXP Semiconductors; P.Radhakrishnan, Open-Silicon; Razzak Mohd. Ali, Altera systems; Girish Baliga, CG-Corel; Prabhat Agarwal, Sankalp semiconductor and Kamal Aggarwal, Intel Technology India Pvt. Ltd
· Seminar - “Cooperative Communication where Network meets the Channel”
PragaTI (TI India University), In Cooperation with: VLSI Society of India and IEEE Circuits and Systems Society Bangalore Chapter
Speaker: Behnaam Aazhang, Department of ECE, Center for Multimedia Communication, Rice University, Houston, TX USA
September 2006
· Short Term Intensive Course on DFT for Digital Design4th – 6th September 2006
VNR Vignana Jyothi Institute of Engineering and Technology, Hyderabad
Sponsored by: VLSI Society of India
Organized by: Dept of ECE, VNR-VJIET, Hyderabad
Course Resource persons:
C.P. Ravikumar, Senior Technologist, Texas Instruments, India
Ram Jonnavithula, Project Manager, DFT, Texas Instruments, India
Jais Abraham, Head-Technology, InnoDes Solutions Pvt. Ltd.
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August 2006
· One-day Course on Circuit MarginalitiesDealing with VLSI Design and Circuit Marginalities during Test
August 1, 2006
The Senator, Kolkata, India
Sponsored by: VLSI Society of India
In Cooperation With:
IEEE TTTC Kolkata Chapter
Presenter:
Sandip Kundu, University of Massachusetts, USA
Web-link
· 10th IEEE VLSI Design & Test Symposium (VDAT2006)
August 9-12, 2006
International Centre, Goa, India
Sponsored by: VLSI Society of India
Industry Sponsors: TI India, Controlnet India, Intel India
In Cooperation With:
IEEE-CS-TTTC, IEEE EDS/SSCS Bangalore Chapter, IEEE CAS Bangalore Chapter
IEEE Goa Chapter,Goa University
Venue – The tutorials and the symposium will be held at the Goa
International Centre
Web-link
· Short Course on Digital Circuits Testing and Design for Testability
Dealing with VLSI Design and Circuit Marginalities during Test
August 17-19, 2006
Hotel Atria, Bangalore.
Sponsored by: VLSI Society of India
In Cooperation With:
IEEE Circuits and Systems Society, Bangalore Chapter
Presenters:
Nilanjan Mukherjee and Professor Sudhakar M. Reddy
Web-link
July 2006
· 3-day Short Course on Design for Testability – Theory and PracticeDFT2006
July 27 – 29, 2006
Hotel Fortune Katriya (www.fortunekatriya.com), Hyderabad
Sponsored by:
VLSI Society of India
In cooperation with: IEEE TTTC and CDAC, Hyderabad
Web-link
The three-day course on “Design for Testability” is intended for practicing engineers as well as faculty and students. It will provide an overview of the subject by two leading experts in the field, who will sprinkle the contents with recent developments in the area.
Instructors:
Prof. Adit Singh and Prof. Vishwani Agrawal, Auburn University
June 2006
· Custom LSI Design WorkshopCLDW 2006
June 1 – 15, 2006
Goa, India
Sponsored by:
VLSI Society of India, ControlNet India, Goa and Karmic (Karnataka Microelectronics, Manipal)
In cooperation with: IEEE Circuits and Systems Society, Bangalore Chapter and IEEE Goa Chapter
Venue:
The workshop will be conducted at the premises of ControlNet India in Verna Industrial Estate.
Web-link
The workshop is open to students and faculty with strong interest in VLSI. Preference will be given to students who have completed third year B.E./B.Tech or 1st year M.E/M.Tech. We encourage small groups of students and faculty from the same organization to apply to take full advantage of the workshop. The number of participants from a single organization will be limited by the committee. It is expected that the participant is familiar with basics of electronics, MOS transistor operation, and has done some reading in MOS LSI.
April 2006
· VTU-VSI-ISA Confluence meetingApril 28, 2006
Belgaum, Karnataka, India
Program:
Inauguration by Prof. K. Balaveera Reddy, VC, Visvesvaraya Technological University
Session I – Analog Design
Challenges in Analog Design – Kaushal Jha, Analog Devices, India
Biasing technique, stability analysis, noise analysis, mismatch analysis, substrate noise in mixed signal design.
Challenges in IO Design – Dharmaray M. Nedalgi, Philips Semiconductors
Issues in IO Cell Design
Session II – System Design
Embedded System Design using FPGA, Razak Mohmmad Ali, Altera Semiconductors India
How to use FPGA devices to build embedded systems – includes demo
Challenges in Low Power Design – Lakshminarayanan Venkatachalam and Umapathy Jayaraman, Intel India
Session III – Student Paper Presentations
1. Wakeup Fresh Alarm
K. Subashith, Santosh Gokak, Apurva Shukla, Colin Rebello, Shweta Shanbhag, Shreyaswini K. and Vijaykumar Thombare
2. Smart Seeder
Sumit J Bhat, Vijaykumar PJ, Nusaiba CA, Vijayanand MJ, Sainath D Patil, Shashikala SG and Mahantesh KT
3. Fun with Faces
Kiriti Kakkar, Lingraj Aras, Manoj Kumar, Rayagond Kaakatunar, Sankar Ghosh, Shashishekhar Patil and Shridhar Moorkhandi
4. Blind, but not Color Blind
Archana Shetty, Madhuri Chowdhary, Malesh S Mugalakhod, Mallikarjun A Biradar, Poornima M Kadakol, Prashant Wilson Crasta P, Rauf S, Shwetha Shetty and Sravani Das B
5. Sudoku – Numbers that outnumber You!
Amruta G Pawar, Sandeep Nayak, Anoosha Shetty, Seema Hegde, Narayan S Mahipati, Shashikala V Pawar, Prashant Kulkarni, Shubhalakshmi M and Ravi S Siddanath
Open Discussion
Award Presentation, Announcements, and Conclusion
March 2006
· 2nd Workshop on Design Verification MethodologiesMarch 24-25, 2006
Wipro Technologies, Pune, India
Speakers:
A.Vasudevan, Wipro Technologies -Bangalore, Raj Mitra, Texas Instruments-Bangalore, Muralidhar Bolisetty, Synopsys-Bangalore, Venkatesan Swaminathan, Intel-Bangalore, Ms. Deepali Maydeo, Tensilica-Pune, Dr Shankar Balachandran, IIT Madras, Subir K Roy, Texas Instruments-Bangalore, Shailesh Dave, eInfochips Ltd-Pune, Vinaya Singh, Cadence Design Systems-Noida, Mahesha Puttanna and Sunil Vishwanathan, Wipro Technologies and Amit Sharma, Synopsys-Bangalore.
February 2006
· VTU-VSI-ISA Confluence MeetingFebruary 24, 2006
Organized by BMS College of Engineering, Bangalore
In cooperation with:
VLSI Society of India, Visvesvaraya Technological University And India Semiconductor Association
The VLSI Society of India signed an MoU with the Visweswaraya Technological University (headquartered at Belgaum, Karnataka) and the India Semiconductor Association in August 2005 in order to spread and improve the quality of VLSI Education. Under the aegis of this MoU, colleges that offer M.Tech programs in VLSI Design and Embedded Systems have been identified as centers where champions from the industry will work in close cooperation with faculty champions to improve the quality of M.Tech programs.
Details on VSI Website
· Workshop on VLSI Design (BITS Pilani)
February 24-26, 2005
Pilani
January 2006
· 19th International Conference on VLSI Design5th International Conference on Embedded Systems
JANUARY 3 - 7, 2006
Taj Krishna Hyderabad, India
Theme: Mobile Embedded Systems
· Two-day Symposium on Electronic System-level Design (ESLD 2006)
Jan 9-10, 2006
Bangalore, India
Speakers:
Prof. Arvind, Massachusetts Institute of Technology, USA; Brian Bailey, Brian Bailey Consulting, USA; Prof. Rajesh Gupta, University of San Diego, California, USA; Dr. Rishiyur Nikhil, CTO, Bluespec Inc.; Dr. Shiv Tasker, CEO, Bluespec Inc.; Mr. Sarang Shelke, Director Technology, Poseidon; Systems, Bangalore; Mr. Bill Salefski, VP Technology, Poseidon Systems,
California; Mr. Viswanath Chakrala, Specialist VLSI System Design, Wipro Technologies, Bangalore
Mr. B.P.Srinivas, Senior Applications Engineer, Coware, Noida; Mr. Himanshu Sanghvi, Project Manager, Tensilica,
California; Mr Nagendra Gulur Dwarakanath, Texas Instruments, India; Mr Badri Gopalan, Ageia, Bangalore; Mr Srinivasan Venkataraman, Synopsys, India; Mr Raghu Tupuri, General Manager (Silicon Design), Advance Micro Devices, Bangalore
· VSI spreads its wings
A local chapter of the VLSI Society of India was inaugurated on 28th January, 2006 at the VNR Vignana Jyothi Institute of Engineering and Technology (VNRVJIET), Hyderabad. The effort to start this chapter was spearheaded by Prof. C.D. Naidu, the head of the Department of Electronics and Communication Engineering of this institution.
Details on VSI Website
2005
December 2005
· A Two-day Workshop on Mixed Signal VLSI Design and TestDecember 2 - 3, 2005
PSG College of Technology, Coimbatore
Sponsored by: VLSI Society of India, Analog Devices, Cadence and Texas Instruments, India
Organized by: PSG College of Technology, Coimbatore
· Three-day Intensive Course on "Design for Testability - Theory and Practice"
December 15 - 17, 2005, New Delhi, India
Organized by VLSI Society of India
In cooperation with IEEE Circuits and Systems Society
Instructors:
Dr.Vishwani D. Agrawal, Auburn University and Dr.C.P. Ravikumar, Texas Instruments India
· A Two-day Workshop on VLSI Signal Integrity
December 16 - 17, 2005
Hotel Atria, Bangalore
Organized by VLSI Society of India.
In cooperation with IEEE Circuits and Systems Society, Bangalore Chapter
Speakers:
Dr. Ram Achar, Carleton University, Canada, Dr. Ashok Balivada, Analog Devices, India, Dr. Shabbir Batterywala, Synopsys, India, Arvind, Texas Instruments India and Dr. C.P. Ravikumar, Texas Instruments India.
· A 3-day Course by Dr.Dinesh Bhatia on “VLSI Physical Design Automation - Introduction to VLSI CAD”
Dec 19-21, 2005
Hotel Atria, Bangalore
Organized by VLSI Society of India.
In cooperation with IEEE Circuits and Systems Society, Bangalore Chapter
· HiPC 2005 (High Performance Computing)
12th IEEE International Conference
December 18-21, 2005
Goa, India
November 2005
· Workshop on Verification MethodologiesNov 25, 2005
Hotel Atria, Bangalore
Organized by VLSI Society of India
In co-operation with: Indian Design Verification Forum and IEEE Circuits and Systems Society
Speakers:
Mahesha Puttanna, Wipro Technologies, Srinivasan Venkataramanan, Synopsys, India, Badri Gopalan, Ageia Technologies, Venkatesan Swaminathan, Intel, Bangalore, Vinaya Singh, Cadence Design Systems, Sundaresan Kumbakonam, Broadcom, and Venkatesh Natarajan, Texas Instruments India.
October 2005
· VLSI Education WorkshopOctober 19-23, 2005
National Institute of Science & Technology (NIST), Behrampur, Orissa
Sponsored by: VLSI Society of India. Co-sponsored by: NIST, Behrampur, Orissa
· A one-day workshop on VLSI Design & Test (Industrial Experience)
Jadavpur University, Oct 24, 2005
September 2005
· A two-day workshop on Reconfigurable Systems and ApplicationsIIT Madras, September 2006.
Coordinated by Prof. V. Kamakoti.
August 2005
· 9th VLSI Design and Test Symposium 2005 (VDAT 2005)August 10-13, 2005
Wipro Learning Centre
Electronics City, Hosur Road, Bangalore
July 2005
· 2nd VLSI Embedded Systems DSP Application Seminar, VEDAS 2005July 1-2, 2005 at Sona College of Engineering, Salem, Tamilnadu
Speakers:
V Kamakoti, IIT Madras; Srinivasan Venkataraman, Synopsys; N.J.R. Muniraj, Sona College of Technology; Navkanta Bhat, IISc,Bangalore; C. P. Ravi Kumar, Texas Instruments; Rahul Kumar, National Semiconductors; Vishal Dalal, Sasken; Soujana Sarkar, Texas Instruments; V. Ranganathan, Sathyam, Chennai, and Chandravel Sankarakumar, Sanmina,Bangalore
· A 4-day Intensive Course on Design for Testability – Theory and Practice
July 27-30, 2005 at Bangalore
Instructors:
Dr.Vishwani D.Agrawal and Prof.Adit D.Singh (Auburn University)
June 2005
· A Two-week intensive hands-on Workshop on Custom LSI Design(at the premises of KARMIC, Karnataka Microelectronics)
Manipal, Karnataka
June 6-18, 2005
For the students and faculty with strong interest in VLSI
May 2005
· VLSI Education WorkshopSJCE (Sri Jayachamarajendra College of Engg), Mysore
May 8-13, 2005.
· A Three-Day National Workshop on Embedded Systems
Shanmugha Arts, Science, Technology & Research Academy (SASTRA)
Thanjavur, Tamilnadu
May 9-11, 2005
· The National Workshop on Challenges in VLSI (NWCV) 2005
Dhirubhai Ambani Institute of Information and Communication Technology
Gandhinagar, Gujarat
May 13 and 14 2005
April 2005
· Short-term Training Program on Advanced VLSI DesignSmt Kashibai Navale College of Engineering, Pune
April 18-23, 2005
March 2005
· VLSI Education WorkshopMNIT, Jaipur, March 8-12, 2005.
February 2005
· A Two-day Workshop on Low Power Design TechniquesIndian Institute of Science, Bangalore, February 25-26, 2005
Speakers::
Dr. Bharadwaj Amruthur, IISc., Bangalore; Dr. V. Visvanathan, Texas Instruments, India; Dr. V. Ramgopal Rao, IIT Bombay, India; Dr Navakanta Bhat, IISc., Bangalore; Chandrashekhar Kypa and Christoph Heer, Infineon Technologies; Dr. K.Itoh, Hitatchi, Japan; Dr. Y.N. Srikant, IISc., Bangalore; Dr. Christian Piguet, CSEM, Switzerland and Dr.C.P.Ravikumar, Texas Instruments India
January 2005
· 18th VLSI Design Conference 2005 and 4th International Conference on Embedded SystemsKolkata, 3-7 January 2005
Theme: POWER AWARE DESIGN OF VLSI SYSTEMS
· A Two-day Workshop on Recent Advances in Memory Technology, Design and Test
Bangalore, January 10-11, 2005.
Speakers:
Sreedhar Natarajan, MoSys Incorporated, Ottawa, CANADA; Dr.Nilanjan Mukherjee, Mentor Graphics, USA; Jayanta Lahiri, Alliance Semiconductors, Bangalore and Dr.C.P.Ravikumar, Texas Instruments India
· A Three day Workshop on Specification and Design Methodologies for Adaptive and Embedded Systems
Indian Institute of Science, Bangalore, January 11-14,2005