A Two-day Workshop on Mixed Signal VLSI Design and Test

December 2 – 3, 2005

Venue: PSG College of Technology, Coimbatore

Sponsored by

Organized by

PSG College of Technology

Coimbatore

About the Organizers

PSG College of Technology, an ISO 9001 Certified institution and accredited by NBA has been in the forefront in offering engineering education for more than five decades. The college offers 15 Undergraduate Programs and 25 Postgraduate Programs. It has 12 centre of excellence like Virtual; Instrumentation centre, VLSI Design Centre, Virtual Reality Centre, Rapid Prototyping and Manufacturing Centre, Thin Film Centre, Robotics and Automation Laboratory.

VLSI Society of India

Cadence

Analog Devices

Texas Instruments India

An intensive two-day workshop is being organized for industry and academic community of Indian organizations with the objective of exposing the participants to the challenges and innovations in the Mixed Signal Design and Test.  The objective of the workshop is to provide a forum to discuss and investigate the emerging problems in the design methodologies and CAD-tools for the new generation of IC technologies for Mixed Signal Design and Test. The technical program of the workshop will include tutorials from experts in the field, and panel discussion sessions.

 Program Committee

C.P. Ravikumar, Texas Instruments India

S Karthik, Analog Devices

Kaushal Kumar Jha, Analog Devices

Raja Mitra, Cadence

Radhakrishna Rao, Texas Instruments

Sudheer Prasad, Texas Instruments

Suresh Gupta, Texas Instruments

M C Bhuvaneswari, PSGCT, Coimbatore

P Vijayakumar, PSGCT, Coimbatore

Organizing Committee

P Navaneethan, PSGCT, Coimbatore

A Sumathi,PSGCT, Coimbatore

R Krishnakumar, PSGCT, Coimbatore

M Sundaram, PSGCT, Coimbatore

A Natarajan, PSGCT, Coimbatore

A Gunagundari, PSGCT, Coimbatore

M Esakkirajan, PSGCT, Coimbatore

Registration Fee

Industry Participants

Rs. 3,000/=

Academic/ R&D Institutions

Rs. 1,500/=

Students

Rs. 1,000/=

The DD must be drawn in favor of “Workshop on VLSI Design and Test” payable at Coimbatore.

Accommodation

Accommodation can be arranged in the Guest House / Student Hostels of the college on request. Delegates are however free to

make their own arrangements at Coimbatore where good Hotels are available with affordable tariff rates.

Registration form also available at: www.psgtech.edu

Registration

Registration is open to industry participants, faculty and postgraduate students of M.Tech programs related to VLSI. The number of participants will be limited to 50. Participants will be admitted on a first-come first-served basis. Selected participants will be notified on or before November 10, 2005. 

The fee includes participation in the workshop, tutorial notes, lunch and refreshments on all the days of the workshop.

Please use the registration form included with this communication.

Day – 1, December 2, 2005 Friday

08.30 am – 09.00 am

Registration

09.00 am – 09.30 am

Inauguration

09.30 am – 10.30 am

Session 1

VLSI Design - A high level overview

Dr. S Karthik, Analog Devices

10.30 am – 11.00 am

Tea Break

11.00 am – 12.30 pm

Session 2

A Tutorial on Continuous Time Filters

Prof. K. Radhakrishna Rao, IIT Madras

12.30 pm – 01.30 pm

Lunch

01.30 pm – 03.00 pm

Session 3

A Tutorial on Continuous Time Filters (Cont’d)

Prof. K. Radhakrishna Rao, IIT Madras

03.00 pm – 03.30 pm

Tea Break

03.30 pm – 04.30 pm

Session 4

Industrial Practices in Mixed Signal Test

Mr. Suresh Gupta, Texas Instruments

04.30 pm – 05.30 pm

Session 5

Genetic Algorithms to VLSI Testing

Dr. M C Bhuvaneswari and P. Vijaykumar, PSG College of Technology

Day – 2, December 3, 2005 Saturday

09.00 am – 10.30 am

Session 6

Mixed Signal Design

Mr. Sudheer Prasad, Texas Instruments

10.30 am – 11.00 am

Tea Break

11.00 am – 12.30 pm

Session 7

Latest Trends in EDA Tools to Develop Next Generation Mixed Signal Design

Dr. Raja Mitra, Cadence

12.30 pm – 01.30 pm

Lunch

01.30 pm – 03.00 pm

Session 8

A Tutorial on Digital to Analog Converter Devices

Dr. Kaushal Kumar Jha, Analog Devices

03.00 pm – 03.30 pm

Tea Break

03.30 pm – 05.00pm

Session 9

Panel Discussion

Topic: VLSI Education

Moderator: Dr. C.P. Ravikumar; Panelists TBD.

05.00 pm – 05.30pm

Session 10

Valedictory Session