3^rd IEEE VLSI Design & Test Workshops

(Confirmation Awaited)

Background: The previous VLSI Design and Test workshops held in January 1998 (Chennai) and August 1998 (New Delhi) have received enthusiastic response. Encouraged by the success of these events, the 3^rd International VLSI Design & Test workshops are being held in New Delhi in August 1999. The aim of the workshops is to encourage research and development activities related to all aspects of VLSI Design and Testing in India.

Three workshops will be held concurrently on August 20-21, 1999 at the Habitat World, New Delhi. The High-level Design workshop will discuss issues related to system-level synthesis, core-based design of SOC, high-level synthesis, logic synthesis, and FPGA synthesis. The Physical Design workshop will discuss issues related to floor-planning, placement, and routing of high-performance integrated circuits and printed wire boards. The workshop will also encourage papers related to fabrication and packaging of integrated circuits and systems. The Test Workshop will discuss issues related to testing, fault-tolerance and testability of digital, analog, and mixed-signal circuits and systems.

Vishwani Agrawal, Lucent Technologies

C.P. Ravikumar, IIT Delhi (General Chair)

Program Chairs for the Workshops:

• High-level Design Workshop :

Anshul Kumar, IIT Delhi

• Physical Design Workshop :

B. Bhattacharya, ISI Calcutta

• Test Workshop:

C.P. Ravikumar, IIT Delhi

Vishwani Agrawal, Lucent Technologies, USA

M.V. Atre, Lucent Technologies, India

M. Balakrishnan, IIT Delhi (India)

J. Becker, Tech.l Univ. of Dormstadt, Germany

B. Bhattacharya, ISI Calcutta

Chandrashekhar, CEERI, Pilani, India

P.P. Chakrabarti, IIT Kharagpur, India

K. Kinoshita, Japan

Anshul Kumar, IIT Delhi, India

M. Mehendale, Texas Instruments, India

S. Nagaraj, Texas Instruments, India

D. Nagchoudhury, IIT Delhi, India

C.P. Ravikumar, IIT Delhi

D. Roychoudhury, IIT Kharagpur

M. Sachdev, U of Waterloo, Canada

C. Tsui, Hong Kong Univ. of Sci. and Tech.

Authors must submit an extended abstract of their work. Proposals for embedded tutorials (1 hr duration) are welcome. Proposals for organizing panel discussions/special sessions are also welcome. Papers and proposals may be sent to

E-mail submissions are acceptable, if they are in ASCII or PostScript format. Send your submission to rkumar@ee.iitd.ernet.in or to vsiSecy@vlsi-india.org. Please indicate your email address/FAX for correspondence.

FAX Submissions may be sent to :

91-11-6862037

Notification of acceptance : June 20, 1999

Web-ready abstract due : July 20, 1999