Report by: Dr.Rajnish Sharma (Chitkara University)
Keynote-1: Electronic Design for Indian Markets Challenges and Opportunities
Jaswinder Ahuja (Corporate VP and MD, Cadence Design Systems India)
Jaswinder Ahuja, the Corporate Vice President and Managing Director of Cadence Design Systems, was in an upbeat mood delivering the keynote talk at the 14th VLSI Design and Test Symposium on July 8, 2010 at Chitkara University campus in Himachal Pradesh. His talk, entitled Opportunities Unlimited the emerging markets in India, focused on the R&D opportunities that have been thrown open to Indian electronic designers and manufacturers as India stands at the threshold of unprecedented economic growth. India has transformed into an electronic design hub, said Mr. Ahuja. "Now is the time to innovate and seize the opportunities in domains such as smart phones, smart grid, medical, and the emerging India-specific markets. Indian products are cost and power-sensitive. They must be more robust to work for Indian conditions. These requirements open up design challenges for Indian electronic industry".
For the Indian market, the equation is not Price = Cost + Profit. We have to rewrite the equation as Profit = Price Cost. The Tata Nano fixed the price at Rs 1 lakh and worked backwards to reduce the cost. We have to draw a lesson from the Tata Nano when we design electronic products for the Indian market.
Mr. Ahuja illustrated a number of examples where Indians have come up with innovative solutions. "Let us take a lesson from the Shampoo industry who came up with the innovation of the sachet to reach a much larger market at the bottom of the pyramid".
Download Keynote-1 foils in PDF 11.67MB
Panel discussion: Electronic Design for Indian Markets Challenges and Opportunities
The panel discussion in VDAT 2010 also focused on the topic of Electronic Design for Indian Markets Challenges and Opportunities. Moderated by Dr. C.P. Ravikumar of Texas Instruments, the panel discussion intended to understand what the killer applications were for the Indian market, how the Indian markets were different from the world market, what the challenges of product design are, and whether the graduating engineers are ready to meet the challenges of product design. Panelists included Mr. Saugat Sen, Vice President R&D of Cadence Design Systems, Mr. Aninda Roy, Senior design leader from Intel, and Prof. M. Balakrishnan of IIT Delhi.
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