The VLSI Society of India (VSI) and Centre for Development of Advanced Computing (C-DAC) organised a two-day course at Hotel Green Park, Hyderabad on 30-31 July 2007 titled “Low-power Design and Test”. The course began with a welcome address by Dr. Sarat Chandra Babu, Director, C-DAC, Hyderabad mentioning the significance of Low-power Design and Test in VLSI. The course was conducted by Dr. Vishwani D. Agrawal (Auburn University) and Dr. Srivaths Ravi (Texas Instruments) focusing mainly on topics like Dynamic and Static Power in CMOS, Power Estimation, Architectural Techniques for Low-power Design, Memory and Multicore Design, Power Management Techniques and Test Power. The course was attended by about 45 participants with a blend of industry and academia like C-DAC, Synopsys, ARM, Kawasaki Microelectronics, Secure Meters, IIT, JNT University, SASTRA University, Osmania University, Manipal University, TIIT and VNRVJIET, Hyderabad. The event concluded with a dinner hosted by C-DAC to promote interaction between the speakers and participants.