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    Third Workshop on Design Verification Methodologies
April 5-6, 2007 - I2IT Pune Campus, Hinjewadi
Event details
Organized by: VLSI Society of India and I2IT Pune
Supported by: Wipro Technologies
Speakers: Dr. P.P.Chakrabarti - IIT Kharagpur; Tarun Garg, Cadence Design Systems; Shanthamoorthi Velusamy, Wipro Technologies; Haridas V., SoC Design Technology, NXP Semiconductors India; Dr.Kaushik De, Verification Business Unit, Synopsys India; Desingh D Balasubramanian, Poseidon-Systems India; Dr. Supratik Chakraborty - IIT Bombay; Aditya Kher, Synopsys India; Manikandan Panchapakesan, NXP Semicondutors India; Vishwanath B and Ankush Jain, NXP Semicondutors India; Bhaskar Karmakar, Texas Instruments India an Mrinal Das, Sankalp Semiconductor